In a data handling system of the type described in the above-identified patent application, a common bus architecture is employed in which an internal transfer bus having a number of ports has a local bus adapter at each port for connecting the bus to the subsystem at such port. The bus includes a number of busy lines, generally one for each port, with all such busy lines being connected to the adapters at all such ports. Each port, or more specifically its adapter, has one of the busy lines uniquely assigned thereto, which busy line is operable for certain purposes when the port is operating as a destination. The busy line, when referred to in connection with its unique port, may be termed a "destination" busy line for such port. The busy lines are also utilized when the subsystems or adapters thereof are acting as sources and when so used, the busy lines may be termed "source" busy lines. Thus each busy line is a destination line for a single port, but a source busy line for all other ports. The busy line is employed to indicate to all other adapters on the bus availability of the adapter to receive a message. In addition, the busy line is used by the source to signal a selected adapter to take a message from the common bus.
Although each busy line is uniquely assigned (as a destination busy line) to a single port and thus to a single adapter and a single subsystem at such port, it is often desirable to add additional subsystems. Such applications would make it desirable for the receiver to determine if the message is for it. However, only a single busy line is normally assigned as a destination busy line to a single port and the systems are thus limited. Therefore, addition of another subsystem in communication with an internal transfer bus ostensibly would require another busy line. To increase the number of busy lines would require complex, difficult and costly modification of the system.
Accordingly it is an object of the present invention to enable two or more subsystems to share a single busy line.